脑机接口的MapReduce计算模型  

A MapReduce computation model for brain-computer interface

作　　者：黄志华[1,2] 

机构地区：[1]福州大学数学与计算机科学学院,福建福州350116 [2]中国科学院昆明动物研究所,云南昆明650223

出　　处：《福州大学学报（自然科学版）》2013年第6期981-985,共5页Journal of Fuzhou University(Natural Science Edition)

基　　金：福建省自然科学基金资助项目(2011J01344);福州大学科技发展基金资助项目(2013-XQ-30);福州大学人才基金资助项目(XRC-1255)

摘　　要：研究了脑机接口各项计算任务的时间关系,把脑机接口的计算过程分成了三个阶段,并把前两个阶段映射为了MapReduce机制的Map和Reduce,提出了脑机接口的MapReduce计算模型.由于脑机接口的绝大多数计算量集中在前两个阶段,该模型能够显著减少脑机接口的计算时间.This paper puts the calculation of brain - computer interface into three stages by studying the sequential relation between the various computation tasks of brain - computer interface, and propo- ses a MapReduee computation model for brain -computer interface by mapping the first two stages of brain - computer interface to Map and Reduce of MapReduce mechanism. Since the majority of the a- mount of computation are in the first two stages, this model can remarkably cut the calculation time of brain - computer interface.

关 键 词：脑机接口 MAPREDUCE 分布并行计算 

分 类 号：TP311.11[自动化与计算机技术—计算机软件与理论]