一种基于FPGA的超宽带雷达数字接收机  

A FPGA Based Digital Receiver for UWB Radar

作　　者：谢跃雷[1] 晋良念[1] 欧阳缮[1] 卢会群[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《现代雷达》2014年第1期62-65,70,共5页Modern Radar

基　　金：广西自然科学基金资助项目(2013GXNSFFA019004;2013GXNSFFA019329);广西无线宽带通信与信号处理重点实验室主任基金资助项目(12107)

摘　　要：脉冲超宽带雷达回波信号由于带宽大而难以直接采样,文中设计并实现了一种基于FPGA的数字式脉冲超宽带雷达接收机。该接收机利用FPGA内嵌锁相环产生特定频率的时钟,驱动四路10 bit ADC器件,根据回波信号在一段时间内呈准静态及周期性的特点,实现了四通道时域伪随机等效采样。仿真及测试结果表明,该数字式脉冲超宽带雷达接收机等效采样速率可达10 GS/s,可有效接收雷达回波信号,满足脉冲超宽带雷达的应用需求。It is hard to sample the ultra wideband radar echoes directly. A digital receiver for UWB impulse signals based on FPGA is proposed in this paper. Based on the quasi-static and periodic characteristics of radar echoes, the proposed receiver with four channels pseudorandom equivalent sampling module is designed and implemented by using embedded PLL of FPGA and four high speed 10 bit ADC chips. The simulation and test results show that the proposed digital receiver can achieve 10GS/s equivalent sampling rate and meet the application requirements of detecting system for UWB radar.

关 键 词：脉冲超宽带 数字接收机 伪随机等效采样 现场可编程门阵列 

分 类 号：TN958[电子电信—信号与信息处理]