Au/PZT/BIT/p-Si结构铁电存储二极管I-V特性  

I-V Characteristics of Ferroelectric Memory Diode with Structure of Au/PZT/BIT/p-Si

作　　者：于军[1] 王华[1] 2.董晓敏 周文利[1] 王耘波[1] 郑远开[1] 赵建洪 

机构地区：[1]华中理工大学电子科学与技术系,武汉430074

出　　处：《Journal of Semiconductors》2001年第2期203-207,共5页半导体学报（英文版）

基　　金：湖北省自然科学基金资助项目 !(98J0 3 6)&&

摘　　要：采用脉冲激光沉积方法 (PL D)制备了 Au/ PZT/ BIT/ p- Si多层结构铁电存储二极管 .对铁电存储二极管的P- E电滞回线、I- V特性曲线分别进行了测试与分析 ,并对其导电行为及基于 I- V特性回滞现象的存储机理进行了讨论 .实验表明 ,所制备的多层铁电薄膜具有较高的剩余极化 (2 7μC/ cm2 )和较低的矫顽场 (4 8k V/ cm ) ,BIT铁电层有助于缓解 PZT与 Si衬底之间的界面反应和互扩散 ,减少界面态 ,与 Au/ PZT/ p- Si结构相比 ,漏电流密度降低近两个数量级 ,I-A new ferroelectric memory diode that consists of Au/PZT/BIT/ p Si was fabricated by Pulsed Laser Deposition (PLD) technique.Ferroelectric and electrical properties of the ferroelectric diode have been characterized through the measurements of P E and I V hysteresis loop respectively.The conductivity behavior and the memory mechanism have been discussed.The results suggest that the multilayer ferroelectric thin films have a large polarization of 27μC/cm\+2 and a low coercive of 48kV/cm.The growth of the BIT ferroelectric layer weakens the serious interaction and interdiffusion in the PZT/Si interface, decreases the leak current density but enlarges the window of I V hysteresis loop.

关 键 词：二级管 I-V特性 PLD 铜 PZT BIT 铁电存储 

分 类 号：TN31[电子电信—物理电子学]