FPGA设计中功耗的分析与仿真  

Analysis and simulation of power consumption in the design of FPGA

作　　者：吴维起 刘安芝[1] 高广珠[1] 

机构地区：[1]国防科学技术大学电子科学与工程学院,湖南长沙410073

出　　处：《现代电子技术》2014年第5期131-133,共3页Modern Electronics Technique

摘　　要：FPGA的应用越来越广泛,随着制造工艺水平的不断提升,越来越高的器件密度以及性能使得功耗因数在FPGA设计中越来越重要。器件中元件模块的种类和数量对FPGA设计中功耗的动态范围影响较大,对FPGA的电源功耗进行了分析,并介绍了如何利用Altera公司的PowerPlay Early Power Estimator这一工具在设计前期尽可能准确地估计功耗并通过估计功耗对硬件设计进行优化选择。FPGA is applied more and more widely,with the improvement of the manufacturing technology level,higher and higher density and complicated performance make the power factor more and more important in the design of FPGA. The amount and type of components in the module have greater influence on the dynamic power consumption in the FPGA design. The power consumption of the FPGA is analyzed. It is analyzed how to estimate power consumption accurately with PowerPlay Early Power Estimator tool of Altera in the early stage of the design and make optimization selection.

关 键 词：静态功耗 动态功耗 触发率 

分 类 号：TN47-34[电子电信—微电子学与固体电子学]