基于分离时序电路的逻辑设计关键技术研究  

The Research of Logical Design's Key Technologies Based on the Timing of Separation Circuit

作　　者：甄国涌[1] 张蔚云[1] 李圣昆[1] 郑永秋[1] 

机构地区：[1]中北大学电子测试技术国家重点实验室,太原030051

出　　处：《科学技术与工程》2014年第5期255-260,共6页Science Technology and Engineering

基　　金：国家自然科学基金(60871041)资助

摘　　要：结合工程实际应用,对分离时序电路中的软件逻辑设计进行研究。分析了关键时间参数的存储原理及流程,并针对电路中输入信号出现的抖动干扰,提出了两种能够实现可靠消抖的软件消抖算法。通过对不同输入信号干扰的产生原理、抖动时间、最适消抖时长的研究计算,以及对不同消抖算法的特点和硬件资源占用量的分析,选择合适的消抖算法。经波形仿真和试验结果证明,关键时间参数存储准确无误,两种算法消抖完整、可靠,满足了工程实际需求,该逻辑设计已应用到实际环境中。Combined with engineering application,the software logicl design which based on the timing of separation circuit was studied.The storage principles and processes of the critical time parameters were analyzed,and in view of the jitter which interference the input signal of a timing of separation circuit,two kinds of software algorithms of signal-wobble elimination are put forward which can realize reliable eliminate dithering.Through the study of principle,jitter time,the optimum length of debounce time of different interferences,and the analysis of characteristics and device utilization rate of different algorithms,the appropriate debounce algorithm is setected.It has been proved by the waveform simulation and test results that the storage of critical time parameters is accurate and those two algorithms are reliable to meet the actual needs of the project.This design has been applied to the actual environment.

关 键 词：分离时序电路 时间参数存储 软件消抖 滑动窗口 计数器 

分 类 号：TP312[自动化与计算机技术—计算机软件与理论] TP391[自动化与计算机技术—计算机科学与技术]