FPGA构造单向串行LVDS接口RAM存储器  

Construction of One-way Serial LVDS Interface RAM Memory Based on FPGA

作　　者：宋娟[1] 吴荣斌[2] 张刚[1] 

机构地区：[1]太原理工大学信息工程学院,山西太原030024 [2]兰州交通大学电子与信息工程学院,甘肃兰州730070

出　　处：《电视技术》2014年第9期89-92,共4页Video Engineering

摘　　要：在Xilinx ISE软件平台上,通过硬件描述语言VHDL设计实现了具有单向串行只写总线接口的RAM存储器,并且使用低压差分信号传输技术,降低误码率和串扰。该存储器大大减少了RAM存储器引脚数目,降低了SoC的空间、功耗和成本,资源利用率高,可以更有效地提高CPU访问存储器的速度。最后在Virtex-5开发板上验证通过。A RAM memory with One-way Write-Only Serial Bus interfaces is designed with hardware description language VHDL on Xilinx ISE plat- form, where the number of RAM memory pins is dramatically reduced and the space, power consumption and cost of SoC are decreased notal）ly. Addi- tionally, this design is of high resource utilization efficiency and the speed of CPU accessing to memory is improved effectively. Finally, the design is ver- ified on Virtex-5 development board.

关 键 词：RAM存储器 FPGA 串并转换 单向串行只写总线 LVDS 

分 类 号：TP368.2[自动化与计算机技术—计算机系统结构]