一种面向多核的可重构容错方法  

Reconfigurable Tolerance Method for Multi-processor System

作　　者：张绍林[1] 杨孟飞[1,2] 刘鸿瑾[1] 姜宏[1] 王若川[1] 

机构地区：[1]北京控制工程研究所,北京100190 [2]中国空间技术研究院,北京100094

出　　处：《计算机科学》2014年第5期59-63,共5页Computer Science

基　　金：国家十二五民用航天项目:基于SoC的航天器可重构控制系统一体化技术资助

摘　　要：随着二代导航、载人航天、深空探测等空间应用对星载电子产品的低功耗和抗辐射容错能力提出更高的需求,传统多机冗余设计星载计算机面临着亟需进行设计升级换代。将可重构技术应用到多核片上系统的设计中,提出了一种基于动态可重构的容错体系结构,在硬件层提高系统的容错能力和扩展性对未来空间工程应用具有重要意义。首先介绍了多核片上系统和可重构技术的基本概念,简要分析了国际宇航可重构系统的研究案例。随后提出了一种基于动态可重构的容错体系结构,即通过基于系统降级的重构策略来实现系统级容错。在方案验证环节,采用LEON3作为处理单元,对容错模块功能进行了仿真验证。仿真结果表明,容错控制满足预期的设计需求。最后对后续工作做了简要规划,并对可重构容错方法设计进行了总结。Because of advancing space applications,such as Second Generation of Navigation System,Manned Spaceflight,Deep Space Missions,requirement on On-Board Computer（OBC） for higher performance has been arisen and normal OBCs are facing an upgrade of consume and rad-hard capability.Based on adaptive reconfiguration technology and System-on-Chip design method,this paper presented a reconfigurable tolerance method for MPSoC.High reliability and expansibility can be achieved at hardware level,which makes a great sense of space applications and military missions in future.After introducing the basic concepts of MPSoC and reconfigurable technique,several representative cases were presented as to show the development of reconfigurable processors.Then the basic infrastructure of our dynamic reconfigurable tolerance system was discussed.Moreover,tolerance strategy based on system degrading was presented in detail A contrast analysis among single core,normal design and our method was provided.Besides,using leon3 to implement the process elements,simulation validation of tolerance module efficiency was given out and the test results show the control mechanism works well.Finally,the future related works were discussed and the proposed reconfiguration tolerance method was concluded.

关 键 词：多核 片上系统 动态可重构 容错 

分 类 号：TP302.8[自动化与计算机技术—计算机系统结构]