一种应用于非接触智能卡锁相环连续时钟电路  

A PLL Based Continuous Clock Circuit in SmartCard

作　　者：徐洋[1] 万培元[1] 林平分[1] 

机构地区：[1]北京工业大学嵌入式系统重点实验室,北京100124

出　　处：《中国集成电路》2014年第5期35-39,共5页China lntegrated Circuit

摘　　要：本文针对13.56MHz非接触智能卡芯片(符合ISO/IEC14443 type A协议标准)特殊应用,实现一种基于锁相环结构的连续时钟电路。电路在载波存在或丢失情况下,均能提供稳定准确的时钟频率,连续时钟电路输出13.56MHz时钟,功耗60μA,面积为165X150μm2。芯片经过SMIC 0.18μm eFlash工艺流片验证,测试表明在协议规定的1.5A/m-7.5A/m场强范围,各种交互波形情况下,芯片均工作正常。This paper designed a PLL based continuous clock circuit for the special application of contactless smartcard which follows the ISO/IEC 14443 type A protocol. The circuit can generate a stable and precise 13.56MHz clock signal even if the carrier clock disappeared provisionally. Current consumption is 60 μ A and area is 165 × 150 μ m^2. This chip was taped out in SMIC 0.18 μ m eFlash process successfully and the test result shows the chip works well under every condition in the protocol.

关 键 词：智能卡 锁相环 连续时钟 

分 类 号：TN409[电子电信—微电子学与固体电子学]