Implementation and integration of a systematic DBPM calibration with PLL frequency synthesis and FPGA  

Implementation and integration of a systematic DBPM calibration with PLL freauencv synthesis and FPGA

作　　者：孙旭东 冷用斌 

机构地区：[1]Shanghai Institute of Applied Physics,Chinese Academy of Sciences [2]University of Chinese Academy of Sciences

出　　处：《Nuclear Science and Techniques》2014年第2期56-61,共6页核技术（英文）

基　　金：Supported by the National Natural Science Foundation of China(No.11075198)

摘　　要：Beam current dependence resulted from nonlinearity and asymmetry of the four channels of digital BPM(Beam Position Monitor) processor deteriorates the BPM performance.A systematic solution based on signal source calibration tactics has been carried out to rectify this defect.It is optimized for implementation in FPGA.Mathematical illustrations of the calibration method,hardware and software design and implementation are presented.A signal source circuit using frequency synthesis technique is designed as calibration standard.Data acquisition system using JAVA web technology and Ethernet is introduced.Integrated FPGA implementation code architecture is presented,and experimental test results show that the method implemented in FPGA is feasible.Compared to other methods,our approach can rectify the nonlinearity and asymmetry simultaneously.The whole solution is integrated into the DBPM processor and can be executed online.Beam current dependence resulted from nonlinearity and asymmetry of the four channels of digital BPM （Beam Position Monitor） processor deteriorates the BPM performance. A systematic solution based on signal source calibration tactics has been carried out to rectify this defect. It is optimized for implementation in FPGA. Mathematical illustrations of the calibration method, hardware and software design and implementation are presented. A signal source circuit using frequency synthesis technique is designed as calibration standard. Data acquisition system using JAVA web technology and Ethernet is introduced. Integrated FPGA implementa- tion code architecture is presented, and experimental test results show that the method implemented in FPGA is feasible. Compared to other methods, our approach can rectify the nonlinearity and asymmetry simultaneously. The whole solution is integrated into the DBPM processor and can be executed online.

关 键 词：数据采集系统 频率合成技术 FPGA DBPM 校准方法 集成 PLL 光位置检测器 

分 类 号：TN911.7[电子电信—通信与信息系统]