小规模集成电路异步十一进制加法计数器设计分析  

Analysis of Small Scale Integrated Circuit of Asynchronous Eleven Decimal Addition Counter Design

作　　者：刘树平[1] 吴勇灵[1] 钱莉[1] 

机构地区：[1]黔南民族师范学院物理与电子科学系,贵州都匀558000

出　　处：《黔南民族师范学院学报》2014年第2期101-104,共4页Journal of Qiannan Normal University for Nationalities

摘　　要：采用小规模集成电路作为电路单元进行异步时序电路设计时,除了需要完成设计同步时序电路所做的各项工作之外,还要遵循挑选时钟信号的原则、求解状态方程的原则。本文通过一个设计实例,讨论、分析了异步时序电路设计的一般规律及其特殊的特点。Using small scale integrated circuit as the circuit unit for asynchronous sequential circuit design, in addition to the completion of the design of synchronous sequential circuits, it also needs to follow the principle of selecting the clock signal, and the principle of simplifying equation of state. This paper, through a design example, discusses and analyzes the general rules of asynchronous sequential circuit design and its special features.

关 键 词：异步时序电路 触发器 卡若图 状态转换表 自启动 

分 类 号：TN4[电子电信—微电子学与固体电子学]