一种新型双通道MOS开关栅压自举电路  

Novel dual-channel MOS bootstrapped switch circuit

作　　者：景鑫[1] 庄奕琪[1] 汤华莲[1] 张丽[1] 杜永乾[1] 

机构地区：[1]西安电子科技大学宽禁带半导体材料与器件教育部重点实验室,陕西西安710071

出　　处：《西安电子科技大学学报》2014年第3期138-144,共7页Journal of Xidian University

基　　金：国家重大科技专项资助项目(2012ZX03001018-001);中央高校基本科研业务费专项资金资助项目(K50511250006)

摘　　要：设计了一种新的低压、高速、高线性度的双通道MOS开关栅压自举电路,该电路采用同时自举NMOS和PMOS的并行结构,不但降低了MOS开关的导通电阻值,同时在输入信号的全摆幅范围内实现了常数的导通电阻;考虑了器件可靠性要求且与标准的CMOS工艺技术兼容.采用0.13μm CMOS工艺和1.2V工作电压的仿真实验表明,提出开关的导通电阻在全摆幅输入信号范围内的变化量小于4.3%;在采样频率为100MHz,输入峰峰值为1V,输入频率为100MHz时,提出开关的总谐波失真达到-88.33dB,较之传统的NMOS自举开关以及标准的CMOS传输门开关,分别提高了约-14.8dB和-29dB.设计的开关可应用于低压、高速高精度的开关电容电路中.A novel low-voltage , high-speed and high-linear dual-channel MOS bootstrapped switch is proposed . This proposed switch utilizes the bootstrapping technique of both NMOS and PMOS simultaneously , thus resulting in small-variation low-value on-resistance over the entire input signal range . The switch considers reliability constrains and is suitable for standard CMOS technology . Based on the 0.13 μm CMOS technology and 1.2 V power supply , simulation results show that the switch achieves an on-resistance variation less than 4.3% throughout the full range （V pp = 1 V ）of the input signal range . For a 100 M Hz input with 1 V （ V pp ） amplitude , the switch has a total harmonic distortion （ T HD ） up to- 88.33 dB at the 100 M Hz sampling frequency , about - 14.8 dB and - 29 dB increase , compared with the conventional bootstrapped NMOS switch and the standard CMOS transmission gate , respectively . The circuit could be applied to the low-voltage and high speed-resolution switched-capacitor circuits .

关 键 词：自举电路 线性 CMOS开关 常数导通电阻 电荷泵 开关电容电路 低电压 

分 类 号：TN432[电子电信—微电子学与固体电子学]