极化码编码器的硬件实现  

Hardware Implementation of Polar Encoder

作　　者：舒长青[1] 沙金[1] 

机构地区：[1]南京大学微电子所,江苏南京210046

出　　处：《电视技术》2014年第13期59-61,共3页Video Engineering

摘　　要：基于信道的组合和分离,当组合信道的数量趋向于无穷大的时候,一部分信道趋向于完美的信道,而一部分信道则趋向于纯噪声信道,即信道极化现象。基于信道极化现象,可以构造极化码,通过选择性使用比较好的组合信道,其纠错能力理论上可以达到香农限。提出了一种简单的基于部分并行输入的极化码编码器的硬件结构,并进行了设计与实现。Based on the channel combination and split, when the number of combined channels goes indefinitely large, some of the channels become perfect, while others become completely noisy. This is called channel polarization. Based on this channel polarization, polar code can be constructed. By choosing the better channels, polar code can reach the Shannon limit. In this article, a simple hardware implementation of polar encoder is designed and implemented based on partially-parallel input.

关 键 词：极化码 比特反转 编码器 

分 类 号：TN911.22[电子电信—通信与信息系统]