PULSE SHRINKING TIME-TO-DIGITAL CONVERTER FOR UWB APPLICATION  

作　　者：Chen Chao Meng Shengwei Xia Zhenghuan Fang Guangyou Yin Hejun 

机构地区：[1]Key Laboratory of Electromagnetic Radiation and Sensing Technology, Chinese Academy of Sciences [2]University of Chinese Academy of Sciences [3]Chinese Academy of Sciences

出　　处：《Journal of Electronics(China)》2014年第3期180-186,共7页电子科学学刊（英文版）

基　　金：Supported by the National High Technology Research and Development Program(No.2012AA121901)

摘　　要：A kind of architecture of Time-to-Digital Converter(TDC) for Ultra-WideBand(UWB) application is presented. The proposed TDC is based on pulse shrinking, and implemented in a Field Programmable Gate Array(FPGA) device. The pulse shrinking is realized in a loop containing two Programmable Delay Lines(PDLs) or a two-channel PDL. One line(channel) delays the rising edge and the other line(channel) delays the falling edge of a circulating pulse. Delay resolution of PDL is converted into a digital output code under known conditions of pulse width. This delay resolution measurement mechanism is different from the conventional time interval measurement mechanism based on pulse shrinking of conversion of unknown pulse width into a digital output code. This mechanism automatically avoids the influence of unwanted pulse shrinking by any circuit element apart from the lines. The achieved relative errors for four PDLs are within 0.80%–1.60%.A kind of architecture of Time-to-Digital Converter （TDC） for Ultra-WideBand （UWB） application is presented. The proposed TDC is based on pulse shrinking, and implemented in a Field Programmable Gate Array （FPGA） device. The pulse shrinking is realized in a loop containing two Programmable Delay Lines （PDLs） or a two-channel PDL. One line （channel） delays the rising edge and the other line （channel） delays the falling edge of a circulating pulse. Delay resolution of PDL is converted into a digital output code under known conditions of pulse width. This delay resolution measurement mechanism is different from the conventional time interval measurement mechanism based on pulse shrinking of conversion of unknown pulse width into a digital output code. This mechanism automatically avoids the influence of unwanted pulse shrinking by any circuit element apart from the lines. The achieved relative errors for four PDLs are within 0.80% 1.60%.

关 键 词：Ultra-WideBand(UWB) Pulse shrinking Time-to-Digital Converter(TDC) Programmable Delay Line(PDL) Delay resolution measurement 

分 类 号：TN812[电子电信—信息与通信工程]