可配置多核处理器的调试器模块化分层设计  

Modular Hierarchical Design of Debugger for Reconfigurable Multi-core Processor

作　　者：黄光红[1] 刘冠男[1] 

机构地区：[1]华东电子工程研究所,合肥230031

出　　处：《单片机与嵌入式系统应用》2014年第7期13-15,共3页Microcontrollers & Embedded Systems

摘　　要：针对可配置处理器特点提出一个基于模块化分层设计的调试器架构。该调试器架构具有较好的可复用性和可扩展性,易于移植到其他处理器。本文提出与具体目标机解耦的调试器设计方法,采用具有统一服务接口的目标调试层与具体目标机交互,使用XML格式文件存储目标机信息,通过目标机信息查询模块获取目标机信息。经工程实践表明,本调试器对可配置处理器支持良好。A hierarchically modularized design debugger architecture is proposed for characteristics of reconfigurable processor. The debugger architecture is prone to reuse and expansibility, can be ported to other processor more easily. The debugger design solution is suggested to solve correlation between debugger and target, adopting target debugging layer which has uniform server interface to communicate with varied target, using XML format file to store target information, obtaining these information by target information query module. The result demonstrates that the debugger can support reconfigurable processor effectively.

关 键 词：可配置处理器 调试器 交叉调试 调试器架构 

分 类 号：TP311.52[自动化与计算机技术—计算机软件与理论]