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作 者:张晓春[1,2,3,4] 高翔 郭崎 刘宏伟[1,2,3,4] 靳国杰[1,2] 孟小甫[1,2,3,4]
机构地区:[1]计算机体系结构国家重点实验室,北京100190 [2]中国科学院计算技术研究所,北京100190 [3]中国科学院大学,北京100049 [4]龙芯中科技术有限公司,北京100190 [5]IBM中国研究院,北京100094
出 处:《高技术通讯》2014年第5期443-451,共9页Chinese High Technology Letters
基 金:863计划(2012AA011002;2012AA012202;2013AA014301);国家自然科学基金(61100163;61133004;61173001;61232009);国家"核高基"科技重大专项课题(2009ZX01028-002-003;2009ZX01029-001-003;2010ZX01036-001-002)资助项目
摘 要:针对动态二进制翻译(DBT)系统对地址转换过程进行一致性维护的基于锁操作的传统方法会在单线程和多线程执行中都造成严重的执行开销的问题,提出了优化一致性维护的机制,通过跟踪热点跳转,在命中率较高的热点跳转的地址转换过程中,避免使用锁操作,仅在检测到并发读写冲突时进行冗余的地址转换。为实现上述检测过程,提出了指令执行时序和地址转换数据的优化设计方法。在基于Godson-3处理器的X86模拟平台上,实验结果显示,优化机制极大地提高了二进制翻译的执行效率,在SPEC CPU2000/2006单线程测试中能够降低平均27.7%(1.8%到58.5%)的执行开销,在NPB多线程测试中能够降低平均18.4%(3.3%到64.6%)的执行开销。The consistency maintenance for address mapping during indirect branch handling in a dynamic binary translation (DBT) system was studied, and a novel approach to optimization of the consistency maintenance was proposed based on the analysis of the traditional lock mechanism based consistency maintenance scheme' s major shortcoming of causing great overhead both in singlethreaded and multithreaded execution. The new method avoids lock operations during the hot branch handling through tracing the hotspot of the indirect branches, and operates redundant address mapping when read-write conflicts are detected. For the detection, a dedicated mechanism was designed to organize the timing sequence of instructions and the address mapping data. The final results of the experiments on the Godson-3 platform emulating the X86 architecture, show that the proposed approach can reduce the execution overhead by 27.7% on average ( 1.8% to 58.5% ) for singlethreaded benchmarks, and by 18.4% on average (3.3% to 64.6% ) for muhithreaded benchmarks.
关 键 词:动态二进制翻译(DBT) 间接跳转 多线程 一致性维护 热点跟踪
分 类 号:TP391.2[自动化与计算机技术—计算机应用技术]
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