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作 者:谢晓娜 Zhu Qingxin Chang Zhengwei Jiang Wei
出 处:《High Technology Letters》2014年第2期201-207,共7页高技术通讯(英文版)
基 金:Supported by the Natural Science Foundation of China(No.61003032,61100118);Artificial Intelligence Key Laboratory of Sichuan Province of China(No.2010RY010,2011RYJ05)
摘 要:As feature sizes shrink,low energy consumption,high reliability and high performance become key objectives of network-on-chip(NoC) design.In this paper,an integrated approach is presented to map IP cores onto NoC architecture and assign voltage levels for each link,such that the communication energy is minimized under constraints of bandwidth and reliability.The design space is explored using tabu search.In order to select optimal voltage level for the links,an energy-efficiency driven heuristic algorithm is proposed to perform energy/reliability trade-off by exploiting communication slack.Experimental results show that the ordinary energy optimization techniques ignoring the influence of voltage on fault rates could lead to drastically decreased communication reliability of NoCs,and the proposed approach can produce reliable and energy-efficient implementations.As feature sizes shrink, low energy consumption, high reliability and high performance become key objectives of network-on-chip (NoC) design. In this paper, an integrated approach is presented to map IP cores onto NoC architecture and assign voltage levels for each link, such that the communication energy is minimized under constraints of bandwidth and reliability. The design space is explored using tabu search. In order to select optimal voltage level for the links, an energy-efficiency driven heuristic algorithm is proposed to perform energy/reliability trade-off by exploiting communication slack. Experimental results show that the ordinary energy optimization techniques ignoring the influence of voltage on fault rates could lead to drastically decreased communication reliability of NoCs, and the proposed approach can produce reliable and energy-efficient implementations.
关 键 词:network-on-chip (NoC) energy minimization RELIABILITY MAPPING voltage assignment
分 类 号:TN402[电子电信—微电子学与固体电子学]
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