多路低中频数字化接收机并行处理设计  

Parallel Processing Design of Multi-channel LIF Digital Receiver

作　　者：郁发新[1] 沈一鹰[1] 刘永坦[1] 

机构地区：[1]哈尔滨工业大学电子工程研究所,哈尔滨150001

出　　处：《现代雷达》2001年第2期69-72,共4页Modern Radar

摘　　要：提出了一种多路低中频数字化接收机并行处理的实现方法。该方法以拓扑结构精致、工作时序简单的并行数字信号处理器子阵列为基础 ,根据工作时序约束方程来计算 DSP子阵列的处理能力 ,构建多路低中频数字化接收处理机 ,使接收机的设计得以简化。最后具体介绍了如何应用该方法。This paper presents a design method of parallel processing application on multi channel low intermediate-frequency (LIF) digital receiver. It is based on the DSP sub array with a simple topology and operation timing to evaluate and determine the processing capability and then construct the parallel processing array for multi channel signals according to the restriction of operation timing. Using this method the design of multi-channel digital receiver may be simplified. Finally, a design example is used to show how to apply this method.

关 键 词：并行处理 数字化接收机 低中频 雷达接收机 信号处理 

分 类 号：TN957[电子电信—信号与信息处理]