An Improved High Resolution Current-Mode Sorter  

一种改进的高精度电流型排序电路(英文)

作　　者：池保勇[1] 石秉学[1] 

机构地区：[1]清华大学微电子学研究所,北京100084

出　　处：《Journal of Semiconductors》2001年第9期1191-1196,共6页半导体学报（英文版）

基　　金：国家自然科学基金资助项目 (批准号 :6 96 36 0 30 )~~

摘　　要：An improved high-resolution current-mode sorter is presented.Its structure complexity is O(N),which is crucial to the expansion of its size,and its dynamic range is large.Only one clock signal and one reset signal are needed.No biasing signal is required.The operation point is constructed according to the input current,so it is self-adaptive,which is very important for an all-purpose component.In average value circuit,subtraction circuit,Winner-Take-All(WTA) circuit and control circuit,it has good performance even at a large input current.This sorter has high precision,high resolution and low power,as has been proved via HSPICE simulation.It can be implemented in the standard digital CMOS technology and widely used in many fields,so it is of great value in applications.提出了一种改进的高精度电流型排序电路 .它的结构复杂性仅为 O(N) ,便于扩展 ;动态范围大 ;它是自适应的 ,工作点由输入电流确定 ,故不需要偏置信号 ,这对作为通用器件使用的排序电路来说是很重要的 .通过利用平均值电路、减法电路、WTA电路和控制电路 ,可以使该电路在大输入电流下依然保持高性能 .HSPICE模拟表明该电路具有高准确性、高精度、低功耗的特点 .它能用标准数字 CMOS工艺来实现 ,可以被应用于很多领域 ,具有很高的应用价值 .

关 键 词：current mode WTA sorter 

分 类 号：TN710[电子电信—电路与系统]