基于数据通路结构的FPGA编译系统新策略  

A New FPGA Compiler Strategy Based on Datapath Module

作　　者：费小泂 郭斌林[1] 童家榕[1] 

机构地区：[1]复旦大学电子工程系CAD研究室,上海200433

出　　处：《微电子学》2001年第5期347-350,共4页Microelectronics

摘　　要：在基于 FPGA的电路设计流程中 ,对电路规整性的利用将导致系统性能和布图效率的提高。针对现有的 FPGA设计软件对电路属性 ,尤其是规整性和层次性 ,考虑不够 ,导致在实现数据通路 (datapath)电路时性能欠佳的事实 ,文章提出了一种适合具有大量规整单元的电路的 FP-GA编译系统构架。此 CAD系统结构将充分考虑具有规整结构的电路单元的特殊性 ,从编译系统的输入部分入手 ,尽可能区分并区别对待普通逻辑与规整单元 ,以便优化规整单元 ,以至整个电路系统的性能。最后 。It's well known that the proper usage of regularity in digital system leads to efficiency, as well as economical design. Considering the fact that the current FPGA compilers pay less attention to the regularity of the circuit, a new FPGA compiler strategy is presented in this paper, which distinguishes datapath module from random logic and treats them in different way, so as to optimize the performance of the datapath. Finally, a new floorplan algorithm based on simulated annealing is described.

关 键 词：编译系统 FPGA 数据通路 电路设计 

分 类 号：TN791[电子电信—电路与系统]