基于SHARC的多功能雷达模拟器的设计与实现  

Design and Implementation of A Radar Signal Simulator Based on SHARC

作　　者：蔡琳洁[1] 陶然[1] 单涛[1] 

机构地区：[1]北京理工大学电子工程系,北京100081

出　　处：《电讯技术》2001年第6期26-29,共4页Telecommunication Engineering

摘　　要：ADSP2 10 6 0是AD公司生产的一种高性能的 32位浮点DSP芯片 ,在雷达模拟系统实时性要求高时 ,可基于ADSP2 10 6 0来实现雷达模拟器。本文介绍了ADSP2 10 6 0的性能 ,给出了雷达模拟器系统实现的系统原理图和硬件框图及软件流程。该雷达模拟器采用PC机加DSP组合的结构 ,用软硬件相结合的方法 ,ADSP2 10 6 0完成实时运算 。ADSP21060 is a high capability 32-bit floating-point DSP chip of AD Company. To content the high requirement of the radar signal simulator system in real time processing,we can implement the multi-function radar video signal simulator based on ADSP21060. This paper provides the application features of ADSP21060. The system hardware diagram and software programme diagram of the system are introduced in detail.The radar signal simulator system adopts the structure of DSP plus PC by means of software combined hardware to generate the required video signal.

关 键 词：雷达模拟器 数字信号处理器 设计 SHARC 

分 类 号：TN95[电子电信—信号与信息处理]