一种中频接收电路的版图设计  

Design for Layout of a IF Receiver Circuit

作　　者：秦义寿[1] 汪宁[1] 吴金[1] 刘其贵[1] 常昌远[1] 魏同立[1] 

机构地区：[1]东南大学微电子中心,南京210096

出　　处：《电子器件》2001年第4期267-273,共7页Chinese Journal of Electron Devices

摘　　要：利用 Cadence版图设计工具采用 B3 0 0工艺对一种中频接收电路芯片的版图设计实例 ,阐述了模拟集成电路版图的设计过程 ,论述了包括单元库建立、布局、布线、设计规则检查 (DRC)和版图对照原理图检查 (LVS)等在内的设计步骤以及进行每一步骤的具体方法 ,尤其对布局和布线这样的关键步骤进行了重点讨论。The layout design procedure for analog IC is expatiated through an example of the layout design of an IF receiver circuit with Cadence Layout Design Tool and B300 Process. The design steps including creation of cell library, placement, routing, DRC and LVS and the specific methods of each step are expounded. Especially, the key steps such as placement and routing are discussed in detail. And finally, the entire layout of the whole chip is presented.

关 键 词：电路设计 集成电路 版图设计 中频接收电路 

分 类 号：TN402[电子电信—微电子学与固体电子学]