耗散型石英晶体微天平硬件电路设计  

A Design of the Hardware Circuit of the Dissipative Type Quartz Crystal Micro-balance

作　　者：刘国华[1] 徐红 鲁楷滨 叶魏翔 岳钊[1] Liu Guohua;Xu Hong;Lu Kaibin;Ye Weixiang;Yue Zhao(Tianjin Key Laboratory of Optoelectronic Sensor and Sensing Network Technology, College of Electronic Information and Optical Engineering, Nankai University, Tianjin 30071, China)

机构地区：[1]南开大学电子信息与光学工程学院,光电传感器与传感网络技术重点实验室,天津300071

出　　处：《南开大学学报（自然科学版）》2018年第6期8-12,共5页Acta Scientiarum Naturalium Universitatis Nankaiensis

基　　金：国家自然科学基金(61271099,61771261);天津市国际合作项目(14RCGFGX00843).

摘　　要：采用负电容补偿技术,AGC自动增益控制,差分运算电路设计了能在液相环境中稳定振荡的QCMD前端振荡驱动电路,通过贝塞尔带通滤波器的接入,使电路工作在3次谐波15 MHz下.设计了一种以FPGA微处理器EP4CE6F17C8N为核心的QCM-D后端数据采集系统,采用高速、高精度的10位并行AD采集芯片ADS826,在晶体与驱动振荡电路之间引入模拟开关,FPGA控制其处于闭合以及周期性闭合2种状态,可同时测量频率和耗散因子D.利用RS232串口将FPGA存储、处理后的数据传送到上位机进行分析、显示、和保存,并在上位机上编写了串口调试工具和测量结果显示界面.With the negative capacitance compensation technique and the AGC automatic gain control, the differential operation circuit is designed to be able to stabilize the oscillation of the QCM-D front end oscillation drive circuit in the liquid phase environment, Through the access of Bessel band-pass filter, the circuit works in the three harmonic 15 MHz. A design of a FPGA microprocessor EP4CE6F17C8N as the core of the QCM-D backend data acquisition system with high speed and high precision 10 bit parallel AD acquisition chip ADS826, and drive in the crystal oscillation circuit between the analog switch, FPGA control in the closed cycle and the closure of two states, which can simultaneously measure the frequency and dissipation factor D. Using RS232 serial port FPGA storage, processing data sent to the host computer for analysis, display, and save, and in the host computer to write a serial port debugging tools and measurement results show that the interface.

关 键 词：耗散型石英晶体微天平(QCM-D) 振荡驱动电路 模拟开关 AD采集 耗散因子D 

分 类 号：TH715.11[机械工程—测试计量技术及仪器]