用非常快速模拟重复退火算法实现的模拟电路模块布局(英文)  

Analog Macro-Cell Placement with Very Fast Simulated Re-Annealing Algorithm

作　　者：张理洪[1] 裴先登[1] UlrichKleine 

机构地区：[1]华中科技大学计算机学院外存储国家实验室,湖北武汉430074 [2]马格德堡大学

出　　处：《软件学报》2002年第6期1059-1068,共10页Journal of Software

基　　金：撒克林-安亥州和西门子公司资助~~

摘　　要：提出了基于非常快速模拟重复退火算法实现模拟电路模块布局的方法,该算法指数倍地快于传统的Cauchy 或 Bolzmann退火算法.其中使用一个滑行函数将绝对布局问题转化为相对布局问题,这样极大地减少了算法的搜索空间,而不会降低搜索成功率.价值函数根据模拟集成电路固有的特点设计而成,模拟电路设计者可根据电路的具体要求选择合适的网络长度估算器.使用最小steiner树方法的全局布线器与布局器同时工作,减轻了后续细节布线环节的工作量,并保证最后布局结果的可用性.最后,给出了使用该布局方法实现运算放大器的版图事例.This paper presents the analog macro-cell placement using the novel very fast simulated re-annealing algorithm, which is exponentially faster than the classical Cauchy or Bolzmann annealing. A slide function is applied to convert the absolute placement to relative placement, which greatly decreases the configuration space without degrading the searching opportunity. The cost function is set up deliberately to meet the special requirements of analog integrated circuits. Several net-length estimators are implemented which analog-circuit designers can choose with a trade-off between accuracy and efficiency. The global routing using the minimum Steiner tree is developed, which runs simultaneously during the placement configuration searching. This will ease the successive detail routing and greatly decrease the revise of final placement result. The layout example of optional amplifier is given to demonstrate its usability. The application of this algorithm drastically improves the design efficiency.

关 键 词：快速模拟重复退火算法 模拟电路 模块布局 全局布线 STEINER树 

分 类 号：TN710[电子电信—电路与系统]