适用DC-OFDM超宽带系统的低复杂度同步器设计  

Low-complexity Synchronizer Used in DC-OFDM UWB System

作　　者：井冰[1] 陈昊[1] 叶凡[1] 李宁[1] 任俊彦[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海201203

出　　处：《复旦学报（自然科学版）》2014年第3期371-379,共9页Journal of Fudan University：Natural Science

基　　金：国家科技重大专项基金资助项目(2011ZX03004-001-02)

摘　　要：提出了一种包括符号同步模块,自动增益控制模块以及对非理想因素的估计补偿模块的同步器.在符号同步模块中,采用相关和阈值搜索的联合判断算法确定前导符的起止位置;在自动增益模块中,采用双闭环的AGC算法来提高调节范围和收敛速度;在非理想因素的估计补偿模块中,针对接收机中出现的载波频偏和IQ失配进行估计补偿.用0.13μm CMOS工艺综合,在相同的工作频率132 MHz下,面积和功耗约为传统方法的50%.A synchronizer with timing synchronization, automatic gain control and estimation and compensation for non-ideal factors is proposed. In the timing synchronization block, correlation with threshold search method is used for confirming the starting and ending position of preambles; in the automatic gain control block, a double closeloop algorithm is used for improving adjustable range and convergence; in the digital compensation block, carrier frequency offset and IQ mismatch are estimated and compensated. According to the results of synthesis using 0. 13μm CMOS process the proposed algorithm could achieve the same frequency of 132 MHz with only about 50% gate count and power consumption of the conventional algorithm.

关 键 词：双载波超宽带 同步器 符号同步 自动增益控制 IQ失配 载波频偏 

分 类 号：TN772[电子电信—电路与系统]