基于时间交替并行采样的超高速数据采集系统硬件设计  

Ultrahigh-speed Signal Acquisition System Hard Device Design Based on TIPS

作　　者：侯跃伟[1] 徐欣[1] 

机构地区：[1]国防科学技术大学电子科学与工程学院,湖南长沙410073

出　　处：《通信对抗》2014年第2期35-39,共5页Communication Countermeasures

摘　　要：现代雷达、通信系统、卫星等各项技术的发展,对数据采集系统的速度和精度都提出了越来越高的要求。受现有器件制造技术的影响,传统结构的ADC(Analog to Digital Converter)在突破高速高精度上受到了限制,而时间交替并行采样(Time-interleaved parallel sampling,TIPS)技术为此提供了一条可行思路。对时间交替并行采样理论进行了研究,并基于此进行了一种超高速数据采集系统的硬件设计,保证数据处理部分能够得到可处理的两路5GSps、10bit信号。As the development of modern radar, communication systems, satellite and other technologies, the speed and accuracy of the data acquisition system are of ever-increasing demands. However, due to the impact of the exist- ing device manufacturing technology, the traditional structure of the ADC is limited in high speed and high precision. The Time-interleaved parallel sampling （TIPS） has provided a valid method to solve the problem. In this article, the basic principles and knowledge of Time-interleaved parallel sampling are studied. Based on the theory, a ul- tra-high-speed acquisition card which can obtain two channels of specifications of 5GSps and lObit is designed.

关 键 词：并行采样 时间交替 ADC 超高速 

分 类 号：TP274.2[自动化与计算机技术—检测技术与自动化装置]