基于多核处理器的加密卡异步并行驱动设计  被引量:3

Asynchronous Parallel Driver Design of Encryption Card Based on Multi-core Processing Unit

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作  者:秦培斌[1,2] 肖志辉 杨大川 杨洋[1] 李希源 

机构地区:[1]西南交通大学信息科学与技术学院,四川成都610031 [2]迈普通信技术股份有限公司,四川成都610041

出  处:《通信技术》2014年第7期832-835,共4页Communications Technology

摘  要:文中通过对VxWorks下多核编程的研究,根据IPSec层异步加解密调用的需求,设计了一种稳定高效的加密卡缓存和数据收发方案,满足了数据高速加解密的需求。加密卡内含6个加解密信道,6个加解密信道通过一个万兆以太通道与主机端相连。驱动程序接收来自IPSec层的加解密数据并进行缓存后,将报文通过万兆以太通道发送给加密卡上相应的加解密信道进行处理。加密卡处理完成后将加解密数据通过以太通道送回主机端,并返回加密卡驱动层,由加密卡驱动层的回调函数返回IPSec。多核并行运行时,不同的核都可以进行异步加解密操作。测试结果表明,这种设计方案是一种高效的、具有良好兼容性的驱动实现方法。With the study of VxWorks multi- core programming and according to the IPSec layer asynchronous encryption and decryption calls,a stable and efficient encryption card data caching and transceiver solutions is designed,which meets high-speed encryption and decryption needs. The encryption card contains six channels,connecting to the host through a Gigabit Ethernet channel. After receiving packets from the IPSec layer and making them into cache,the driver layer sends the packets to the corresponding channels in the encryption card via the Gigabit Ethernet channel. The packets are sent back to the host via the Gigabit Ethernet channel after the encryption process is complete and returns to the IPSec layer through the callback function. When all cores run in parallel,different cores can perform encryption and decryption at the same time. Test result shows that this driver design is an efficient and good compatibility method.

关 键 词:加密卡 异步驱动 多核处理器 IPSEC 

分 类 号:TP393.1[自动化与计算机技术—计算机应用技术]

 

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