直接数字波形合成中存储结构改进方法  

Improved Method of Storage Structure in Direct Digital Waveform Synthesis

作　　者：朱文戈[1] 叶凌云[1] 

机构地区：[1]浙江大学生物医学工程与仪器科学学院,杭州310027

出　　处：《计算机工程》2014年第7期230-234,共5页Computer Engineering

摘　　要：直接数字波形合成(DDWS)可以最大程度保证信号的细节不遗漏,是模拟不规则波形的主要技术手段。现有DDWS存储结构虽然能解决速度性能与存储空间之间的矛盾,但是周期采样数必须是并行通道数的整数倍,限制了信号的输出精度。针对该问题,提出一种存储结构改进方法。通过研究波形数据输出序列的规律,改进地址发生器,对并行输出数据进行自适应选择,增加并行重构器,实现并行数据自适应排序。在现场可编程门阵列(FPGA)平台上进行综合后仿真验证,结果表明,该方法能克服周期采样数受限的不足,提高信号的输出精度,且逻辑增量小于FPGA总逻辑资源的1%,在硬件资源上具有明显优势。Direct Digital Waveform Synthesis（DDWS）, which can ensure the greatest degree of signal details are not missed, is a main method to generate irregular waveform. Though existing memory structure in DDWS is able to overcome the contradiction between high-speed quality and memory space, the number of sampling must be multiples of the number of channel, which restricts the signal accuracy. To solve this problem, a method of memory structure is proposed. Though the study of the principle in the waveform output sequence, adaptive selection of parallel output data is implemented by modifying the address generators, adaptive sorting of parallel output data is implemented by adding parallel re-constructor. Through simulation and verification on Field Programmable Gate Array（FPGA）, the results indicate that the restriction on the number of sampling is overcome and output accuracy of the signal is improved. By analyzing the resource dissipation, the overhead increment of logic resources is less than 1% of total logic resources in FPGA, which has a significant advantage on the hardware resources.

关 键 词：直接数字波形合成 存储结构 自适应 并行重构器 现场可编程门阵列 综合后仿真 输出精度 

分 类 号：TP741[自动化与计算机技术—检测技术与自动化装置]