基于SYSGEN的OVCDMA硬件协仿真设计  

Design of OVCDMA Hardware Co-simulation Based on SYSGEN

作　　者：徐迪宇[1] 

机构地区：[1]深圳清华大学研究院,广东深圳518057

出　　处：《工业控制计算机》2014年第7期75-76,78,共3页Industrial Control Computer

摘　　要：介绍了一种借助SYSGEN(System Generator)和Matlab对FPGA硬件电路算法进行实时协仿真的设计。在FPGA平台上设计OVCDMA的硬件逻辑算法,并定义电路板与控制计算机的数据交换格式,利用SYSGEN的软硬件协同仿真功能,实现了对FPGA算法程序的实时仿真,验证了硬件程序的可靠性,证明了OVCDMA算法的硬件逻辑的性能。Real-time co-simulation method based on Matlab and SYSGEN （System Generator） is represented in this paper.Hardware logical algorithm of OVCDMA is designed on FPGA first,and data exchange format between control computer and PCB is defined.Taking advantage of software and hardware co-simulation function of SYSGEN,a real-time hardware logical algorithm on FPGA is realized.The reliability of the FPGA logic is verified,and the performance of OVCDMA is approved.

关 键 词：FPGA硬件协仿真 SYSGEN OVCDMA 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]