低信噪比下互相关时延估计器的FPGA实现  

FPGA Realization of Cross-correlation Time Delay Estimator under Low SNR

作　　者：江雪[1] 刘源源[1] 雷维嘉[1] 谢显中[1] 

机构地区：[1]重庆邮电大学移动通信技术重庆市重点实验室,重庆400065

出　　处：《电讯技术》2014年第7期951-957,共7页Telecommunication Engineering

基　　金：国家自然科学基金资助项目(61271259;61301123);长江学者和创新团队发展计划资助项目(IRT1299);重庆市科委重点实验室专项经费项目~~

摘　　要：在时延估计算法中,相关法是一种经典的算法。时域互相关法可用来进行整数倍和非整数倍采样周期的时延估计,即使是在极低的信噪比(SNR)条件下,利用较多的数据也能获得准确和稳定的估计结果。为提高时延估计分辨率,给出了一种采用sinc函数对信号进行非整数倍采样周期延时的相关估计算法,通过仿真比较了未插值、两倍插值法和sinc函数延时法的估计精度和计算量,证明sinc函数延时法性能最优。基于现场可编程逻辑门阵列(FPGA)实现的改进型互相关时延估计器能够实现在低信噪比下时延差的准确估计。The correlation method is a classical algorithm for time delay estimation（TDE）. The time-domain cross-correlation method can be used for integer and non-integer sample delay estimation. Even at low signal-to-noise ratio（SNR） environment, accurate and stable estimated results can be obtained with the more amount of data. In order to improve the resolution, this paper analyzes a correlation algorithm based on sinc function realizing non-integer sample delay, and draws the conclusion that this method has optimal performance by simulations and comparisons between no interpolation method ,twice-interpolation method and sinc function method in terms of estimation accuracy and computation complexity. The improved cross-correlation estimator based on field programmable logic gate array（FPGA） can achieve accurate TDE under low SNR.

关 键 词：时延估计 时域互相关 非整数倍时延 sinc函数 

分 类 号：TN402[电子电信—微电子学与固体电子学]