基于IEEE-1394总线的高速数据采集系统设计  

Design of a High-speed Data Collecting System Based on IEEE-1394 Bus

作　　者：呼明亮[1] 车炯晖[1] 赵君[1] 任晓琨[1] HU Ming-liang, CHE Jiong-hui, ZHAO Jun, BEN Xiao kun （Xi＇an Aeronautics Computing Technique Research Institute, AVIC, Xi＇an 710065, China）

机构地区：[1]中航工业西安航空计算技术研究所,陕西西安710065

出　　处：《电脑知识与技术》2014年第7期4450-4453,共4页Computer Knowledge and Technology

摘　　要：为了实现数据采集系统实时性、通用化、小型化设计,该文提出了一种基于IEEE-1394总线的高速数据采集系统设计和实现方案。硬件架构上,系统采用IEEE-1394总线专用芯片,实现了数据高速率、高可靠性传输;采用FPGA＋DSP的数据处理架构,将数据采集与算法处理分开独立运行;采用FPGA静态局部重构技术,实现了不同子系统的功能配置;采用开关动态切换技术,实现了信号采集的灵活配置和小型化设计。软件架构上,系统采用模块化设计思路,实现了不同工作模式之间的切换。实验表明该系统具备很强的数据采集与解算能力。In order to achieve the design of data collecting system in real-time, universal and miniaturization, this paper introduces a design and implementation of a high-speed data collecting system based on IEEE-1394 Bus. In the hardware architecture,the IEEE-1394 Bus dedicated chips are used to achieve the high-speed data acquisition and reliability transmission. By using FPGA＋DSP data processing architecture, the data acquisition and processing algorithms run separately. By using the static partial reconfiguration technology, different subsystem achieves specific functional configuration. By using switch technology, the circuits of analog signals implement flexible configuration and come in pattern design. In the software architecture, a modular design concept is used to the system design, and switching between different operating modes is realized. The system has the strong advantage of data collection and solver capabilities as illustrated in the experiment.

关 键 词：数据采集 IEEE-1394 静态局部重构 模式配置 

分 类 号：TP336[自动化与计算机技术—计算机系统结构;自动化与计算机技术—计算机科学与技术]