VLIW-Superscalar混合结构处理器分支预测结构设计  

DESIGNING A BRANCH PREDICTOR ON A VLIW- SUPERSCALAR HYBRID MICROPROCESSOR

作　　者：杜勇[1] 李秦华[1] 陈峰扬 郭德源[1] 李笑天[1] 何虎[1] 

机构地区：[1]清华大学微电子所,北京100084

出　　处：《计算机应用与软件》2014年第8期25-27,78,共4页Computer Applications and Software

基　　金：核高基重大专项(2012ZX01034001002)

摘　　要：在一款同时支持超标量与超长指令字执行方式混合结构数字信号处理器上,为超标量结构添加分支预测功能。为控制硬件设计的复杂度,同时保证分支预测的命中率,分支预测方案使用gshare预测器。在设计完成的硬件上,运行由Open64编译器编译的Dhrystone、Coremark基准测试程序。实验结果表明,在添加分支预测功能后,处理器的性能提高30%～35%。This paper shows the way to add a branch prediction function for superscalar on a digital signal processor which supports the hybrid execution mode of both Superscalar and the VLIW. To control the complexity of the hardware design and obtain a high-enough prediction accuracy,gshare predictor is chosen for branch prediction scheme. The Dhrystone and Coremark benchmark test programs which are compiled by an Open64-based compiler have been run on the hardware to be completed the design. Experimental result shows that 30% ～35% performance improvement is obtained after the branch predictor is added.

关 键 词：超标量 超长指令字 数字信号处理器 分支预测 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]