基于自路由互连网络的粗粒度可重构阵列结构  

Coarse-grained Reconfigurable Array Based on Self-routing Interconnection Network

作　　者：陈锐[1,2] 杨海钢[1] 王飞[1] 贾瑞[1,2] 王新刚[1,2] 

机构地区：[1]中国科学院电子学研究所,北京100190 [2]中国科学院大学,北京100190

出　　处：《电子与信息学报》2014年第9期2251-2257,共7页Journal of Electronics & Information Technology

基　　金：国家自然科学基金(61204045;61271149);中国科学院;国家外国专家局创新团队国际合作伙伴计划资助课题

摘　　要：互连网络在粗粒度可重构结构(Coarse-Grained Reconfigurable Array,CGRA)中非常重要,对CGRA的性能、面积和功耗均有较大影响。为了减小互连网络导致的面积开销和功耗并提升CGRA的性能,该文提出一种具有自路由和无阻塞特性的互连网络,构建了一种层次型的网络拓扑结构。通过这种互连网络,任意一对处理单元之间均可以建立连接和交换数据,而且这种连接是自路由和无阻塞的。实验结果显示,与已有结构相比,该结构以至多增加14.1%的面积开销为代价,获得最高可达46.2%的整体性能提升。Interconnection network plays an important role in Coarse-Grained Reconfigurable Arrays （CGRAs）, and it has a significant influence on the performance, area cost and power consumption. To reduce the area cost and power consumption caused by the interconnection network, and improve the performance of CGRA, a self-routing and non-blocking interconnection network is proposed, and a hierarchical network topology is constructed. Through the proposed interconnection network, connection and data exchange can be established between any pair of processing elements. Moreover, the process of connection establishment is self-routing and non-blocking. Experimental results demonstrate that, compared with existing CGRAs, the overall performance of the proposed architecture is improved up to 46.2% at the expense of 14.1% increase of area cost.

关 键 词：片上系统(SoC) 粗粒度可重构结构 互连网络 网络拓扑结构 自路由 

分 类 号：TN402[电子电信—微电子学与固体电子学]