VHDL语言在电子设计中的应用  

Application of VHDL Language in the Electronic Design

作　　者：王彩凤[1] 李卫兵[2] 卞丽[1] 

机构地区：[1]滨州学院光电工程系,山东滨州256603 [2]滨州学院教务处,山东滨州256603

出　　处：《实验科学与技术》2014年第4期65-67,共3页Experiment Science and Technology

基　　金：滨州学院教学研究项目(BYJYYB201228)

摘　　要：VHDL作为一种硬件描述语言,主要用于数字电路与系统的描述、模拟和自动设计,是当今电子设计自动化(EDA)的核心技术。文中简单介绍了VHDL语言的特点和相应的设计流程,并通过具体实例说明了VHDL语言在数字电子设计中的应用,给出了仿真结果,并对结果进行了分析讨论。VHDL, as a new type of hardware description language, is mainly used to describe, stimulate and automatically design digital circuits and systems. Nowdays, it becomes a key technology in electronic design automation （EDA）. This paper simply introduces the properties and design process of VHDL. Through the specific example, the application of VHDL in the electronic design is illustrated and the simulation result is obtained. The analysis and discussion of the result is also carried.

关 键 词：VHDL语言 电子设计自动化 应用 设计流程 

分 类 号：TN702[电子电信—电路与系统] TP312[自动化与计算机技术—计算机软件与理论]