变采样周期锁相环的分析与设计  

Analysis and Design on Variable Sampling Period Phase-Locked Loops

作　　者：张晓蕊[1] 许津铭[1] 钱强[1] 谢少军[1] 

机构地区：[1]南京航空航天大学自动化学院,江苏省南京市210016

出　　处：《电网技术》2014年第9期2605-2610,共6页Power System Technology

基　　金：国家自然科学基金项目(51077070)~~

摘　　要：现有文献对变采样周期锁相环(variable sampling period PLL,VSP_PLL)的原理分析尚不深入,且未给出其调节器设计方法。通过与传统的基于同步旋转坐标系锁相环(synchronous reference frame PLL,SRF_PLL)对比,明晰了VSP_PLL的控制机制,揭示了其内在联系。建立了VSP_PLL的离散域数学模型,分析了采用不同调节器的VSP_PLL环路特性,得出了调节器(包括其型式及参数)的优化设计方法。实验结果验证了所设计的VSP_PLL在电网电压出现谐波、不平衡、幅值及频率瞬变的情况下均可准确快速地锁相。In existing literatures relevant to variable sampling period phase-locked loop （VSP_PLL） the principle analysis is unsatisfactory and the design approach of its controller is not yet given. Through the comparison of VSP_PLL with traditional synchronous reference frame based PLL, the control mechanism of VSP_PLL is clarified, and the internal relation between them is revealed. A Z-domain mathematical model of VSP PLL is established and the loop properties of VSP_PLL adopting different regulators are analyzed, thus an optimization method for the regulator, including its type and parameters, is obtained. Experimental results validate that using the designed VSP_PLL the phase-lock can be rapidly and accurately implemented under the harmonics in grid voltage, three-phase imbalance and instantaneous change of voltage amplitude as well as under instantaneous change of grid frequency.

关 键 词：锁相环 变采样周期 三相不平衡 调节器设计 

分 类 号：TM71[电气工程—电力系统及自动化]