基于IEC61850-9-2合并单元的研究与设计  被引量:1

Research And Design of Merging Unit Based on IEC61850-9-2

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作  者:杨新华[1,2] 包继刚[1] 王用玺 

机构地区:[1]兰州理工大学电气工程与信息工程学院,甘肃兰州730050 [2]甘肃省工业过程先进控制重点实验室,甘肃兰州730050

出  处:《自动化与仪器仪表》2014年第6期47-51,共5页Automation & Instrumentation

摘  要:介绍了一种智能变电站合并单元的设计方案,采用现场可编程逻辑阵列(FPGA)作为硬件框架,充分利用FPGA的模块化编程和多任务处理的特点,通过在FPGA芯片上配置NiosII软核处理器和相关接口,完成合并单元采样脉冲同步、数据采集及处理,将数据按照IEC61850-9-2标准组帧通过以太网与过程层设备通信发送至过程层设备。运用MMS Ethereal软件对本合并单元输出的电压、电流信号进行测试,结果表明该合并单元所送数据与接收数据一致,符合9-2标准。本装置可以实现了合并单元多任务、大信息量及实时高通速信的要求,具有较强的实用价值。For the more effective application of modular programming and multi-tasking of FPGA, the de-sign of an intelligent substation merged cells is proposed using field programmable logic array (FPGA) as a hardware framework. By configuring Nios II soft-core processor and associated interface on the FPGA chip, the merger unit completes sampling pulse synchronization, data acquisition and processing, and the data is sent to the process layer device via Ethernet equipment and process layer in accordance with IEC61850-9-2 stan-dard framing. Using MMS Ethereal software to test voltage and current signals of output from the merging unit, the results show that the combination unit to send data and receive data consistency meeting the standard 9-2. This device can achieve the demand of merge cells of multi-tasking, a large amount of information and re-al-time high-speed communication, and have a strong practical value.

关 键 词:合并单元 FPGA 9-2 以太网 

分 类 号:TP393[自动化与计算机技术—计算机应用技术]

 

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