面向低能耗的非精确异构多核上的运行时技术  

Run-time technology for low-power oriented inexact heterogeneous multi-core

作　　者：房双德 杜子东 方运潭[1,2,3] 黄元杰[1,2,3] 李华伟[1,2] 陈云霁[1,2] 吴承勇[1,2] 

机构地区：[1]中国科学院计算机体系结构国家重点实验室,北京100190 [2]中国科学院计算技术研究所,北京100190 [3]中国科学院大学,北京100049

出　　处：《高技术通讯》2014年第8期791-799,共9页Chinese High Technology Letters

基　　金：核高基重大专项(2009ZX01028-002-003;2009ZX01029-001-003;2010ZX01036-001-002);863计划(2012AA012202;2012AA010901);国家自然科学基金(61003064;61100163;61133004;61222204;61221062;61303158);中科院先导专项(XDA06010403)资助项目

摘　　要：为降低异构多核处理器芯片的能耗,为非精确异构多核平台提出了一种基于分层调节器的硬件抽象和搜索方法。该方法首先将异构多核硬件及其非精确参数抽象为树状结构,其次使用能效分数标定调节器树,最后在线搜索其路径,为程序的每个算法获得最佳的硬件及其参数配置。实验表明,该方法能够在满足用户精确度需求的前提下,相比于精确CPU核,平均降低40%的能耗,且能够很好地适应精确度需求的变化。To reduce the energy consumption of a heterogeneous multi-core processor,a hierarchical-regulator based hardware abstraction and search approach is proposed for the inexact heterogeneous multi-core architecture.The approach organizes heterogeneous cores and inexact parameters into an abstract regulator tree,then calibrates the tree with energy efficiency scores,and finally,designs an online tree search algorithm to find the optimal core combination and inexact parameter settings for each algorithm of a program.The experimental results show that compared to running the programs directly on an exact CPU,this approach can achieve an average energy reduction of 40％,without violating user-defined accuracy constraints.It is demonstrated that the approach is adapted to the changing of accuracy constraints.

关 键 词：非精确计算 异构多核 分层调节器 运行时 能耗减少 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]