Design and analysis of a dual mode CMOS field programmable analog array  

作　　者：程小燕 杨海钢 尹韬 吴其松 张洪锋 刘飞 

机构地区：[1]Institute of Electronics Chinese Academy of Sciences [2]University of Chinese Academy of Sciences

出　　处：《Journal of Semiconductors》2014年第10期152-162,共11页半导体学报（英文版）

基　　金：Project supported by the CAS/SAFEA International Partnership Program for Creative Research Teams and the National High Technology Research and Development Program of China(No.2012AA012301)

摘　　要：This paper presents a novel field-programmable analog array （FPAA） architecture featuring a dual mode including discrete-time （DT） and continuous-time （CT） operation modes, along with a highly routable connection boxes （CBs） based interconnection lattice. The dual mode circuit for the FPAA is capable of achieving targeted op- timal performance in different applications. The architecture utilizes routing switches in a CB not only for the signal interconnection purpose but also for control of the electrical charge transfer required in switched-capacitor circuits. This way, the performance of the circuit in either mode shall not be hampered with adding of programmability. The proposed FPAA is designed and implemented in a 0.18 μm standard CMOS process with a 3.3 V supply voltage. The result from post-layout simulation shows that a maximum bandwidth of 265 MHz through the interconnection network is achieved. The measured results from demonstrated examples show that the maximum signal bandwidth of up to 2 MHz in CT mode is obtained with the spurious free dynamic range of 54 dB, while the signal processing precision in DT mode reaches 96.4%.This paper presents a novel field-programmable analog array （FPAA） architecture featuring a dual mode including discrete-time （DT） and continuous-time （CT） operation modes, along with a highly routable connection boxes （CBs） based interconnection lattice. The dual mode circuit for the FPAA is capable of achieving targeted op- timal performance in different applications. The architecture utilizes routing switches in a CB not only for the signal interconnection purpose but also for control of the electrical charge transfer required in switched-capacitor circuits. This way, the performance of the circuit in either mode shall not be hampered with adding of programmability. The proposed FPAA is designed and implemented in a 0.18 μm standard CMOS process with a 3.3 V supply voltage. The result from post-layout simulation shows that a maximum bandwidth of 265 MHz through the interconnection network is achieved. The measured results from demonstrated examples show that the maximum signal bandwidth of up to 2 MHz in CT mode is obtained with the spurious free dynamic range of 54 dB, while the signal processing precision in DT mode reaches 96.4%.

关 键 词：field-programmable gate array field-programmable analog array configurable analog block rail-to- rail biquadratic filters 

分 类 号：TN432[电子电信—微电子学与固体电子学]