FPGA中信号可靠性设计的方法研究  

Research on Methods of Signal Reliability in FPGA

作　　者：宁永慧[1] 司国良[1] 李云飞[1] 

机构地区：[1]中国科学院长春光学精密机械与物理研究所,长春130031

出　　处：《计算机测量与控制》2014年第11期3636-3638,共3页Computer Measurement &Control

摘　　要：对FPGA程序设计中存在的信号抖动、相位差异以及在模块继承时不同时钟域引起的软件异常等可靠性设计问题,将目前常用的信号抖动抑制及判断方法进行了分析总结,提出了几种新的FPGA内部的信号处理方法;通过实验验证,这些方法对不同脉冲宽度、不同突发频率的随机干扰,能够进行有效抑制;通过合理降频、例化原语等方法优化软件设计,提高了FPGA输出信号的完整性和可靠性;在航天、航空和工业控制领域中,有效地解决了软件系统的可靠性问题,为建立可靠性高、运行稳定的软件系统创造了条件。Due to the jitter of the signals into the FPGA,as well as the different signal phases and different clock regions in the FPGA,the software reliability design became important and complex as well as the circuits.It analyzed some jitter control methods of the signals and classified them,then designed a few new methods of how to deal with the jitter signals.The methods could restrain pulse-noise with different width and frequency.They improved the signal integrity and reliability by cutting down the output frequency reasonably,or making use of the primitive in FPGA.In other words,they could enhance the reliability and stability of the FPGA software.These methods were easy to implement in VHDL,and they could give a guarantee to the projects in aero-space projects and industry control regions.

关 键 词：FPGA 抖动抑制 时钟域处理 信号质量 

分 类 号：TN707[电子电信—电路与系统]