基于FPGA的高速数据采集系统设计  

Based on FPGA high-speed data acquisition system design

作　　者：王丹琦[1] 吴毅[2] 甘晓炫 

机构地区：[1]新疆师范大学物理与电子工程学院,新疆乌鲁木齐830054 [2]新疆农业大学科学技术学院,新疆乌鲁木齐830091

出　　处：《电子设计工程》2014年第21期153-155,158,共4页Electronic Design Engineering

基　　金：新疆维吾尔自治区高校科研计划资助(XJEDU2010S48)

摘　　要：针对实际中日益明显的单片机的较慢处理速度与越来越高速的数模转换器速率不能匹配的问题,本文分析了FPGA作为控制单元的特点,在此基础上设计了一个由FPGA控制的数据采集系统。提出了系统整体设计方案,自行设计了FPGA与A/D和MCU的硬件接口电路,并对如何应用FPGA实现数据采集系统的数据采集和数据缓存的逻辑控制,给出了详细的说明。对直流信号、交流信号进行了实际采集,实验数据证明,采用这种方法可以较好满足数据采集系统的实时性、同步性的要求,也增加了系统应用的灵活性。Increasingly significant for the actual obvious MCU slower processing speed and more high-speed digital to analog converter＇s rate can not match. For this problem, the characteristics of FPGA as the control unit is analyzed and a data acquisition system controlled by FPGA is designed in this paper. Overall system design is proposed, the hardware interface circuit between FPGA and A/D is independent designed, and gives a detailed description on how to use FPGA data to carry out the data acquisition of data acquisition system and logic control of data cache. For the actual acquisition to DC signal and AC signal, The results shows that this approach can better meet the real time and synchronization requirements of data acquisition system, but also increase the application flexibility of the system.

关 键 词：MAX118 FPGA MCU 数据采集 

分 类 号：TP335.1[自动化与计算机技术—计算机系统结构]