层次化架构嵌入式多核处理器原型设计及其编程研究  

Study of prototype design of embedded multi-core processor with hierarchy and its parallel programming

作　　者：侯宁[1] 赵红梅[1] 张多利[2] 高明伦[2] 

机构地区：[1]河南城建学院电气与信息工程学院,河南平顶山467000 [2]合肥工业大学微电子设计研究所,安徽合肥230009

出　　处：《合肥工业大学学报（自然科学版）》2014年第11期1322-1327,共6页Journal of Hefei University of Technology：Natural Science

基　　金：国家自然科学基金资助项目(61179036;61106020)

摘　　要：VLSI技术进步和应用驱动使多核技术成为主流的微处理器设计技术。多核处理器作为一种时空域器件,应把超级计算机作为多核处理器的设计参考系,其主流架构将最终收敛到"小核、大阵列、层次化"上。文章利用Xilinx Virtex5-330TFPGA器件,设计实现了一款集成16个处理核的具备层次化架构特征的嵌入式多核处理器原型芯片,工作频率为90 MHz。多核处理器利用层次化的体系架构、灵活的片上互连、多种同步机制以及合理的并行程序模型,成功加载了实时视频淡入淡出(fade-in-fade-out)混叠应用(320×240,30帧/s)。基于该多核处理器架构,研究比较了粗粒度和细粒度2种并行编程模型。细粒度模型的多核同步操作稍复杂,但很好地掩盖了应用的串行操作时间,对视频淡入淡出混叠应用的加速比可达6.97。With the rapid development of very‐large‐scale integration （VLSI ） technology ,the advanced multi‐core architecture has become a prevalent approach to further improving the processor performance and meeting the increasing magnitude of application requirement .As the multi‐core processor is the time‐space domain de‐vice ,its development and design technology should refer to supercomputer .So the dominating architecture of multi‐core processor should obey the characteristics of small core ,large array ,and hierarchy .Based on this architecture ,an embedded multi‐core processor with hierarchy is designed ,integrating 16 cores and running on Xilinx Virtex5‐330T FPGA at 90 M Hz .Taking advantage of hierarchy architecture ,flexible interconnec‐tion ,versatile synchronization mechanism and reasonable parallel program model ,this multi‐core processor can accomplish real‐time fade‐in‐fade‐out processing of 4‐lane video aliasing （320 ＆#215; 240 ,30 fps） .Two parallel models for the multi‐core processor are also presented ,namely fine‐grained and coarse‐grained parallelization . Although the fine‐grained parallelization program model is a little bit complex in multi‐core synchronous oper‐ation ,it can conceal the serial operation time well ,and the multi‐core processor can gain a speedup of 6.97 for fade‐in‐fade‐out video application .

关 键 词：层次化 多核处理器 FPGA器件 并行编程模型 视频混叠 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]