高速多通道并行AD采集卡的设计  

Design of High Speed and Multi-channel Parallel AD Sampling Card

作　　者：覃春淼 王鑫 陈业伟 秦轶炜 原浩娟 

机构地区：[1]上海航天电子通讯设备研究所,上海201109

出　　处：《计算机测量与控制》2014年第12期4107-4110,共4页Computer Measurement &Control

基　　金：国家国际科技合作专项资助项目(2012DFB10200)

摘　　要：多通道同步采样技术在相控阵雷达中得到了广泛的应用;针对多通道、高采样率的ADC系统对PCB设计带来的技术挑战,提出了利用两块ADC芯片通过FMC接口至FPGA控制完成4路模拟信号的实时同步采样技术方案,用于改善高速模数混合电路设计中器件布局、电源和信号完整性等对ADC性能的影响,并在分析时钟抖动对信噪比影响的基础上,完成了时钟和ADC芯片外围电路设计;该方案设计灵活、简单,通用性强,可广泛应用于相控阵雷达、MIMO通信、波束形成、声纳等领域。Multi-channel and synchronous sampling technology is widely implemented in the phased array radar.In order to couple with the challenge of PCB design brought by multi-channel and high sampling frequency ADC,a scheme which one FPGA connected with FMC interface control two ADC chips realize real-time and synchronous sampling of 4 channel analog signals is proposed.It can improve the performance of SNR caused by the component arrangement、power and signal integrity in high speed analog and digital hybrid circuit design.The clock and ADC peripheral circuit are designed based on the analysis of SNR brought by the clock jitter.This design is flexible、simple and general-purpose,It can be widely implemented in area such as phased array radar,MIMO communication,beamforming,sonar and so on.

关 键 词：模数转换 时钟抖动 FMC 

分 类 号：TP274.2[自动化与计算机技术—检测技术与自动化装置]