Turbo乘积码译码器的并行实现方法  

A Parallel Implementation of TPC Decoder

作　　者：陆连伟 冯占斌 

机构地区：[1]广州海格通信集团股份有限公司,广东广州510663

出　　处：《通信技术》2014年第12期1371-1374,共4页Communications Technology

摘　　要：本文介绍了Turbo乘积码(TPC)的串行和并行译码器结构,提供了一种TPC译码器的并行实现方法,该方法对译码器乘积码的P(P≥8)行或列进行并行译码,在性能不下降的情况下,显著提高了译码器的吞吐量。与此同时,文中对传统的分量译码器算法——CHASE算法进行了改进,改进后的译码器缩短了译码周期,从而进一步提高了吞吐量。本文设计的译码器结构适用于多子码的TPC译码器,可实现不同码字的兼容。This paper describes the serial and parallel structures of turbo product codes （TPC） ,proposes a parallel implementation of TPC to realize simultaneous decoding of P（P≥8） row-wise or column-wise code vectors of a product code, thus the decoding throughput is obviously raised without any performance degradation. Furthermore, the traditional decoder algorithm CHASE algorithm, is modified, and this modified algorithm could reduce the decoding cycle and thus further increse the throughput. The proposed decoder architecture is applied to TPC decoder of multi-subeode and could achieve compatibility of among different codons.

关 键 词：TURBO乘积码 迭代译码 并行译码 CHASE算法 

分 类 号：TN914.31[电子电信—通信与信息系统]