自动频率跟踪数字锁相放大器设计  

Design of Automatic Frequency Tracking Digital Lock-in Amplifier

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作  者:张金敏[1] 商庆健 王厅长 

机构地区:[1]兰州交通大学机电工程学院,兰州730070 [2]兰州交通大学机电技术研究所,兰州730070

出  处:《核电子学与探测技术》2014年第6期794-800,共7页Nuclear Electronics & Detection Technology

基  金:大规模并网风电机组预防性维护动态控制策略研究(61263004)

摘  要:在光电检测系统的设计中,往往采用锁相检测系统来消除1/f噪声和其他外部的噪音。论文是在Alter公司DSP Builder基础上设计的数字锁相放大器,同时为避免待测信号与参考信号的失配,增设了频率自动跟踪模块,从而更好地实现参考信号频率的匹配,确保测量精度。经过仿真验证可行后,将编译好的程序下载到FPGA器件中,并对硬件电路进行设计和测试。实验结果表明,在待测信号的信噪比RSNR≈-10 d B时,最小检测幅值为50μV,锁频相对误差小于0.015%,待测信号幅值的测量相对误差小于0.11%。因此该自动频率跟踪数字锁相放大器可以有效实现微弱光电信号的检测。In the design of photoelectric detection system,lock-in detection system is often used to eliminate the 1 / f noise and other powerful noise.In this paper,the digital lock-in amplifier is designed based on DSP Builder of Alter Company.At the same time,in order to avoid the mismatch between measured signal and reference signal,the automatic frequency tracking module is designed,so as to realize the matching with the reference signal frequency,and ensure the measurement accuracy.After simulation,the compiled file is downloaded to the FPGA device,realizing the hardware design by hardware test.Experimental results show that,the SNR(Signal to Noise Ratio) of the measured signal is less than10 d B,the minimum amplitude detection is 50μV,the frequency-locked error is less than 0.015%,the measurement error of the signal amplitude is less than 0.11%,and the design can effectively realize the need of photoelectric detection.

关 键 词:信号检测 数字锁相放大器 DSP BUILDER 自动频率跟踪 现场可编程门阵列 

分 类 号:TM93[电气工程—电力电子与电力传动]

 

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