CMOS毫米波低功耗超宽带共栅低噪声放大器（英文）  

Millimeter- wave low power UWB CMOS common-gate low-noise amplifier

作　　者：杨格亮[1] 王志功[1] 李智群[1] 李芹[1] 刘法恩 李竹[1] 

机构地区：[1]东南大学射频与光电集成电路研究所,江苏南京210096

出　　处：《红外与毫米波学报》2014年第6期584-590,共7页Journal of Infrared and Millimeter Waves

基　　金：Supported by the 973 project(2010CB327404);the 863 project(2011AA10305);National Natural Science Foundation of China(61106024,60901012)

摘　　要：陈述了一个基于单端共栅与共源共栅级联结构的超宽带低噪声放大器（LNA）.该LNA用标准90-nm RFCMOS工艺实现并具有如下特征：在28.5～39 GHz频段内测得的平坦增益大于10 dB;-3 dB带宽从27～42 GHz达到了15 GHz,这几乎覆盖了整个Ka带;最小噪声系数（NF）为4.2dB,平均NF在27 ～ 42 GHz频段内为5.1 dB;S11在整个测试频段内小于-11 dB.40 GHz处输入三阶交调点（IIP3）的测试值为＋2 dBm.整个电路的直流功耗为5.3 mW.包括焊盘在内的芯片面积为0.58 mm×0.48 mm。This paper presents an Ultra-wideband （UWB） low-noise amplifier （LNA） based on a single-ended common-gate （CG） in cascade with cascode configuration.The proposed LNA was implemented by a standard 90-nm RF CMOS technology.The measured flat gain is more than 10 dB from 28.5 to 39 GHz.The-3 dB bandwidth is 15 GHz from 27 to 42 GHz which covers almost the entire Ka band.The minimum noise figure （NF） is 4.2 dB,and the average NF is 5.1 dB within the 27 ～42 GHz range.The S11 is better than-11 dB over the overall testing band.The input 3rd-order intermodulation point （IIP3） is ＋ 2 dBm at 40 GHz.The DC power dissipation of the whole circuit is as low as 5.3 mW.The chip occupies an area of 0.58 mm ×0.48 mm including all pads.

关 键 词：毫米波 宽带 互补金属氧化物半导体(CMOS) 共栅 低噪声放大器(LNA) 集成电路(IC) 

分 类 号：TN4[电子电信—微电子学与固体电子学]