Application Aware Topology Generation for Surface Wave Networks-on-Chip  

Application Aware Topology Generation for Surface Wave Networks-on-Chip

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作  者:Zhao Fu Zheng-Bing Hu Cheng Gong Wen-Ming Pan Guo-Bin Lv 

机构地区:[1]the Department of Computer,China University of Geosciences (Wuhan) [2]Guangzhou Institute of Advanced Technology, China Academy of Sciences [3]the Department of Network, China University of Geosciences (Wuhan)

出  处:《Journal of Electronic Science and Technology》2014年第4期366-370,共5页电子科技学刊(英文版)

基  金:supported by the National Natural Science Foundation of China under Grant No.61376024 and No.61306024;the Natural Science Foundation of Guangdong Province under Grant No.S2013040014366;Basic Research Program of Shenzhen No.JCYJ20140417113430642 and JCYJ20140901003939020

摘  要:The networks-on-chip (NoC) communication has an increasingly larger impact on the system power consumption and performance. Emerging technologies, like surface wave, are believed to have lower transmission latency and power consumption over the conventional wireless NoC. Therefore, this paper studies how to optimize the network performance and power consumption by giving the packet-switching fabric and traffic pattern of each application. Compared with the conventional method of wire-linked, which adds wireless transceivers by using the genetic algorithm (GA), the proposed maximal declining sorting algorithm (MDSA) can effectively reduce time consumption by as much as 20.4% to 35.6%. We also evaluate the power consumption and configuration time to prove the effective of the proposed algorithm.The networks-on-chip (NoC) communication has an increasingly larger impact on the system power consumption and performance. Emerging technologies, like surface wave, are believed to have lower transmission latency and power consumption over the conventional wireless NoC. Therefore, this paper studies how to optimize the network performance and power consumption by giving the packet-switching fabric and traffic pattern of each application. Compared with the conventional method of wire-linked, which adds wireless transceivers by using the genetic algorithm (GA), the proposed maximal declining sorting algorithm (MDSA) can effectively reduce time consumption by as much as 20.4% to 35.6%. We also evaluate the power consumption and configuration time to prove the effective of the proposed algorithm.

关 键 词:Maximal declining sorting algorithm networks-on-chip surface wave network performance 

分 类 号:TN92[电子电信—通信与信息系统]

 

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