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作 者:赵飞义 张万荣 丁春宝[1] 陈昌麟[1] 胡瑞心[1] 卓汇涵[1] 江之韵[1] 白杨[1] 陈亮[2]
机构地区:[1]北京工业大学电子信息与控制工程学院,北京100124 [2]泰山学院物理与电子工程学院,山东泰安271000
出 处:《微电子学》2014年第6期737-740,745,共5页Microelectronics
基 金:国家自然科学基金资助项目(60776051;61006044;61006059);北京市自然科学基金资助项目(4082007;4142007);山东省高等学校科技计划项目(J13LN09)
摘 要:采用TSMC 0.18μm CMOS工艺库,设计并验证了一种应用于3.1~10.6GHz频段的超宽带低噪声放大器。该放大器分为两级:采用跨导增强技术的共栅结构作为输入级,实现了输入阻抗匹配,提高了增益并降低了噪声;第二级是放大输出级,由两个共源放大管和源跟随器缓冲管构成,并采用两级电流复用配置将它们连接在一起,不但对信号进行了二次放大,降低了功耗,而且实现了输出匹配。仿真结果表明,在3.1~10.6GHz频带范围内,放大器增益为14.8dB,增益平坦度为±0.6dB,噪声系数介于2.9~4.5dB,输入和输出的回波损耗均优于-11dB,1dB压缩点为-20.8dBm,在1.8V电压下,静态功耗仅为8.99mW。Based on the TSMC 0. 18 tzm CMOS process library, a 3. 1-10. 6 GHz low power ultra-wideband low noise amplifier was designed. The amplifier consisted of two stages. At the input stage of a common-gate structure, a kind of transconductance enhancement technique was used to achieve good input match, high gain and low noise. The second stage was amplification output. It consisted of two common source amplification transistor and source follower buffering transistor which were connected through the current reuse configuration. The signal was magnified two times, therefore the power consumption was reduced, and the output match was obtained. The simulation results showed that over the range of 3.1-10. 6 GHz , the power gain was 14. 8 dB, the gain flatness was ±0. 6 dE, the noise figure was from 2. 9 dB to 4. 5 dB, the input and output match loss were both below --11 dB, the 1 dE compress point was --20.8 dBm. With the supply voltage of 1.8 V, the static power consumption was only 8. 99 mW.
分 类 号:TN722.3[电子电信—电路与系统]
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