Driving circuit with high accuracy and large driving capability for high voltage buck regulators  

作　　者：李亚军 来新泉 叶强 袁冰 

机构地区：[1]Institute of Electronic CAD Xidian University [2]Key Laboratory of High-Speed Circuit Design and EMC Ministry of Education Xidian University

出　　处：《Journal of Semiconductors》2014年第12期106-113,共8页半导体学报（英文版）

基　　金：supported by the National Natural Science Foundation of China(No.61106026);the Fundamental Research Funds for the Central Universities of China(No.K50511020028)

摘　　要：This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can resist high voltage, but whose source–gate must be less than 5 V, is used as the high-side switch. The proposed driving circuit provides a stable and accurate 5 V driving voltage for protecting the high-side switch from breakdown and achieving low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and dead time is also developed to reduce the shoot-through current loss. Therefore, power efficiency is greatly improved. An asynchronous buck regulator with the proposed technique has been successfully fabricated by a 0.35 μm CDMOS technology. From the results, compared with the accuracy of16.38% of the driving voltage in conventional design, a high accuracy of 1.38% is achieved in this work. Moreover,power efficiency is up to 95% at 12 V input and 5 V output.This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can resist high voltage, but whose source–gate must be less than 5 V, is used as the high-side switch. The proposed driving circuit provides a stable and accurate 5 V driving voltage for protecting the high-side switch from breakdown and achieving low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and dead time is also developed to reduce the shoot-through current loss. Therefore, power efficiency is greatly improved. An asynchronous buck regulator with the proposed technique has been successfully fabricated by a 0.35 μm CDMOS technology. From the results, compared with the accuracy of16.38% of the driving voltage in conventional design, a high accuracy of 1.38% is achieved in this work. Moreover,power efficiency is up to 95% at 12 V input and 5 V output.

关 键 词：high voltage buck regulator PLDMOS driving circuit dead time 

分 类 号：TM44[电气工程—电器]