一种4bit相位量化DAC电路分析  

Analysis on Circuit of a 4 bit Phase Quantizing DAC

作　　者：邹振杰[1] 王湛[1] 陈明辉[1] 

机构地区：[1]中国电子科技集团公司第五十四研究所,河北石家庄050081

出　　处：《无线电通信技术》2015年第2期92-96,共5页Radio Communications Technology

基　　金：国家部委基金资助项目

摘　　要：针对数字射频存储器(DRFM)量化方式的差异、优势和不同的应用范围,介绍相位量化数模转换器(DAC)的系统架构,提出相位量化DAC主要电路模块的一种实现方案,论述了该方案的优缺点,并基于90 nm CMOS工艺模型进行仿真,仿真结果表明该芯片可在2 GHz时钟速率下完成转换和量化,瞬时带宽可达250 MHz。This paper discusses and analyzes the advantages and different application field of quantizing mode of digital radio frequency memory, and introduces the structure of 4-bit phase quantizing DAC. An implementation method of main circuit module of phase quantizing DAC is presented. The advantages and disadvantages of this method are analyzed. The simulation is performed based on 90 nm CMOS technology, and the results show that this circuit can accomplish conversion and quantization at 2 GHz clock rate, and the IBW is 250 MHz.

关 键 词：数字射频存储器 相位量化DAC 电流源 

分 类 号：TN432[电子电信—微电子学与固体电子学]