一种面向智能传感器的低功耗高精度sigma-delta调制器设计  

A low-power and high-precision sigma-delta modulator for smart sensor

作　　者：周文彬[1,2] 贾绍磊 梅年松[1] 张钊锋[1] 

机构地区：[1]中国科学院上海高等研究院微纳器件中心,上海201210 [2]中国科学院研究生院,北京100190

出　　处：《电子设计工程》2015年第2期84-87,共4页Electronic Design Engineering

基　　金：上海市科委院地合作项目(12DZ1500900)

摘　　要：设计了一款工作在1.2 V电源电压下,功耗为196μW,精度为14 bit,FOM值达202.4,应用于物联网领域的ΣΔ调制器,其OSR为64,采用四阶前馈单位量化结构,大幅度降低了系统对OTA的要求。通过Matalb SD-TOOLBOX确定系统参数,进行行为级建模确定最优值,同时对系统架构和电路模块进行低功耗分析,针对调制器各级进行适当的增益缩放。该调制器采用SMIC0.18μCMOS工艺设计,输入信号频率为3.4 k Hz,采样时钟为1.28 MHz时,调制器SNDR达到88.6 d B,达到有效位14 bit精度,处理带宽10 k Hz的要求。A modulator is designed with 1.2 V supply voltage, 196uW power consumption, 14bit precision, and FOM is up to 202.2.The oversampling rate is 64, using 4th-order noise reshaping .The feed-forward structure with one bit quantization is used to reduce the limit of the OTA. With the help of the Matlab SD-TOOLBOX, the system parameters are derived .The behavioral modeling is used to find the optimal parameters. And the low power optimization is performed for the system structure and circuit model by scaling down the OTAs of the second, third and fourth modulator stage to reduce the power. The modulator was implanted in SMIC0.18tL CMOS process, and the input signal frequency is 3.4 kHz at OSR of 64. The result shows that the modulator can achieve a SNDR of 88.6 dB with 1.28 MHz sampling clockand 10 kHz signal bandwidth. The resolution achieves 14 bit ENOB.

关 键 词：∑△调制器 开关电容 动态比较器 前馈级联积分器 系统建模 

分 类 号：TN432[电子电信—微电子学与固体电子学]