一种16位600MS/s电流舵D/A转换器的设计  

Design of a 16-Bit 600MS/s Current Steering Digital to Analog Converter

作　　者：杨皓元 李儒章[2] 杨卫东[2] 苏丹[1,2] 吴唱 高胜[1,2] 

机构地区：[1]重庆邮电大学,重庆400065 [2]模拟集成电路重点实验室,重庆400060

出　　处：《微电子学》2015年第1期6-9,13,共5页Microelectronics

摘　　要：基于0.18μm CMOS工艺,设计了一种16位600 MS/s电流舵D/A转换器。该D/A转换器为1.8V/3.3V双电源供电,采用并行输入、差分电流输出的四分段(5+4+3+4)电流舵结构。采用灵敏放大器型锁存器可以精确锁存数据,避免出现误码;由恒定负载产生电路和互补交叉点调整电路组成的同步与开关驱动电路,降低了负载效应引起的谐波失真,同时减小了输出毛刺;低失真电流开关消除了差分开关对共源节点处寄生电容对D/A转换器动态性能的影响。Spectre仿真验证结果表明,当采样频率为625MHz,输入信号频率为240MHz时,该D/A转换器的SFDR为78.5dBc。Based on 0.18μm CMOS process,a 16-bit 600 MS/s current steering D/A converter was designed.Dual power supplies of 1.8 V/3.3 Vand parallel input,differential current output four-segment（5＋4＋3＋4）current steering structure were adopted.Sensitive amplifier latches which could accurately latch data and avoid error were adopted.Synchronization and switch drive circuits consisted of constant clock load circuit and complementary signal crossing point adjustment circuit,which could reduce the output glitch and the harmonic distortion made by load effect.Low distortion current switches eliminated the influence to the dynamic performance of the D/A converter,which was caused by the capacitance of the common node of the switches.Results from Spectre simulation showed that the D/A converter had a SFDR of 78.5dBc when the sampling frequency was 625 MHz and the input signal frequency was 240 MHz.

关 键 词：分段电流舵 数模转换器 电流开关 无杂散动态范围 

分 类 号：TN792[电子电信—电路与系统]